Intel Clearwater Forest Xeon CPUs With Up To 288 E-Cores To Utilize Foveros Direct 3D Stacking Technology

Intel Clearwater Forest Xeon CPUs With Up To 288 E-Cores To Utilize Foveros Direct 3D Stacking Technology

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Intel Clearwater Forest Xeon CPUs With Up To 288 E-Cores To Utilize Foveros Direct 3D Stacking Technology
Intel Clearwater Forest Xeon CPUs With Up To 288 E-Cores To Utilize Foveros Direct 3D Stacking Technology 1

Intel Clearwater Forest Xeon CPUs will be making use of Foveros Direct technology to 3D Stack up to 288 cores on top of the base tile, says Bionic_Squash.

The Clearwater Forest CPUs are going to be the successor to the Sierra Forest Xeon chips which launch around mid-2024. These chips have one thing in common and that's the use of E-Cores instead of P-Cores. The E-Cores used by Sierra Forest chips are codenamed Sierra Glen and are slightly modified versions of the Crestmont core architecture whereas the Darkmont cores used within Clearwater Forest chips are based on slightly modified versions of the Skymont cores.

Latest information suggests that Intel will be fully leveraging its hybrid bonding technology which is codenamed Foveros Direct for 3D Stacking of the Clearwater Forest Xeon CPUs. The CPU package is going to consist of a base tile on top of the interposer which is connected through a high-speed I/O, EMIB, and the cores will be sitting on the topmost layer.

For a quick recap of Intel's Foveros Direct technology, it will allow direct copper-to-copper bonding, enabling low resistance interconnects and around 10-micron bump pitches. Intel itself states that Foveros Direct will blur the boundary between where the wafer ends and the package begins. The technology was previously disclosed to be manufacturing-ready by 2H 2023 however that has since changed.

It will be interesting to see the implementation of 3D Stacking (Foveros Direct) on the Intel Xeon E-Core family. Clearwater Forest chips are expected to feature up to 288 cores and 288 threads with significant improvements in IPC and efficiency. Another thing that was recently highlighted was the addition of higher cache on the package so it might be possible that the base tile itself incorporates extra pools of cache which will be directly connected to the cores sitting on the top layer. The Xeon Clearwater Forest CPUs are expected to launch in 2025 but we can expect more info from the blue team during its IFS direct keynote tomorrow.

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