Synopsys Unveils Industry’s First PCIe 7.0 IP Solution: Up To 512 GB/s Data Rate

Synopsys has announced the world's first PCIe 7.0 IP solution that powers the next-gen of HPC & AI supercomputing chip designs.

Press Release: Synopsys today unveiled the industry's first complete PCIe 7.0 IP solution consisting of a controller, IDE security module, PHY, and verification IP. This solution will enable chip makers to address the demanding bandwidth and latency requirements of transferring massive amounts of data for compute-intensive AI workloads while supporting broad ecosystem interoperability.

Large language models' demand for computational capabilities is growing at a breakneck pace, with trillions of parameters needing to be processed in data centers as fast and reliably as possible. Synopsys offers the industry's only PCIe standards-based solution for secure data transfers up to 512 GB/s bidirectional in a x16 configuration to mitigate AI workload data bottlenecks. Synopsys will demonstrate this world's first technology at PCI-SIG DevCon in Santa Clara on June 12 and 13, 2024.

"As the leading provider of interface IP, Synopsys continues to give designers access to the latest interfaces in the most advanced nodes, helping them to address the demands of compute-intensive designs," said John Koeter, senior vice president of marketing and strategy for IP, Synopsys. "Synopsys' IP for PCI Express 7.0 will provide customers with a complete, standards-based solution enabling an early start on next generation of HPC and AI designs and accelerating the path to silicon success."

World's First PCIe 7.0 IP Over Optics Demo at PCI-SIG Developers Conference 2024

Synopsys will feature two world's first demonstrations at the PCI-SIG Developers Conference on June 12 and 13, 2024: PCI Express 7.0 PHY IP electrical-optical-electrical (E-O-E) TX to RX running at 128 Gb/s with OpenLight's Photonic IC, and PCIe 7.0 Controller IP showing a successful root complex to endpoint connection with FLIT transfer. In addition, Synopsys will showcase its PCIe 7.0 IP ecosystem interoperability with multiple partners, including Keysight Technologies, Samtec, and Teledyne LeCroy.

Industry's First Complete Synopsys PCIe 7.0 IP Solution

Synopsys' IP solution for PCIe 7.0, including controller, IDE security module, PHY, and verification IP, reduces integration risk for AI and HPC networking chips. The IP solution, compliant with evolving standards, improves interconnect power efficiency by up to 50% and enables twice the interconnect bandwidth for the same chip perimeter compared to prior PCIe generations. Synopsys PCIe 7.0 Controller IP enables low latency, high-bandwidth links with a full endpoint to the root-complex solution that supports all required features for backward compatibility.

Synopsys PCIe 7.0 PHY IP provides excellent signal integrity with speeds up to 128 Gb/s per lane and seamlessly integrates with CXL Controller IP solutions. Synopsys Integrity and Data Encryption (IDE) Security IP for PCIe 7.0 provides confidentiality, integrity, and replay protection against hardware-level attacks. Synopsys PCIe 7.0 Verification IP and hardware-assisted verification solutions offer built-in protocol checks and multiple configurations of controller and PHY to accelerate verification and validation closure.

Broad Portfolio of Synopsys IP for High-Performance Computing

Synopsys offers the industry's broadest high-speed interface IP portfolio for high-performance computing SoC designs, including complete, secure IP solutions, 1.6T/800G Ethernet, CXL, and HBM. With Synopsys' extensive interoperability testing, comprehensive technical support, and robust IP performance, designers can accelerate time to silicon success and production.

Availability & Additional Resources

The Synopsys PCIe 7.0 Controller with IDE Security and PHY IP for advanced processes will be generally available in early 2025.