Intel Xeon 6900P “Granite Rapids” With 128 P-Cores Launch In Q3 2024, Xeon 6900E “Sierra Forest” With 288 E-Cores In Q1 2025

Intel Xeon 6900P "Granite Rapids" CPUs will launch in Q3 2024 with up to 128 cores while Xeon 6900E CPUs bring up to 288 cores in Q1 2025.

In contrast to the Xeon E-Core offerings, the P-Core offerings are optimized for performance in compute-intensive and AI workloads such as HPC, Database & Analytics, AI, Networking, Edge, & Infrastructure/Storage. Both CPUs share a common platform foundation & shared software stack.

Before diving into the details, Intel provides us with a brief layout of its performance uplifts with the Xeon 6900P lineup which is as follows:

For its Xeon 6 P-Core lineup, codenamed Granite Rapids, Intel will be starting big. Right off the bat, we will be getting the highest-end configurations in the Xeon 6900P family (Q3 2024) with the rest of the lineup Xeon 6700P & Xeon 6300P launching in Q1 2025 alongside the higher-end Xeon 6900E "Sierra Forest" chips.

Intel Xeon 6 CPU Configurations: XCC, HCC, LCC With Up To 288 E-Cores & 128 P-Cores

The Intel Xeon 6900 series are chiplet-heavy design with as many as 4 chiplets for the Xeon 6900E "Sierra Forest" E-Core CPUs and as many as five chiplets for the Xeon 6900P "Granite Rapids" P-Core CPUs. Also, while the Xeon 6700E CPUs are based on a singular die configuration, the Xeon 6700E SKUs will come in three distinct flavors. These include an LCC die with a single compute die for up to 16 cores, the HCC die with a single yet bigger compute die with up to 48 cores and the XCC die with two compute tiles for up to 86 cores.

The XCC tile for the Xeon 6900P CPUs comes in triple compute tile configurations with up to 128 cores. The CPU itself can offer up to 144 cores but it is slightly disabled due to yields. Following is how the lineup stacks up:

Some of the interesting features of the modular compute die architecture have also been laid out which include:

Intel Xeon 6E With Sierra Glen & Xeon 6P With Redwood Cove Core Architecture

As for the architecture, the Intel Xeon P-Core (Granite Rapids) family will employ Redwood Cove cores with hyper-threading (2 threads per core), feature 2 MB of L2 cache per core, AVX-512 (2x512), Intel AMX and vector operations support, 64 KB L1i and 48 KB L1d cache, an 8-wide decode, 6-wide allocate, 8-wide instruction retire design with 512 instruction out-of-order execution engine and 1024 BF16/FP16 and 2048 Int8 Flops per cycle. Some additional features for the P-Core lineup include FP16 support through the Intel AMX matrix engine, MVR DIMM support offering up to 8800 MT/s speeds, and AES-256 bit / 2048 encryption key support.

The Intel Xeon E-Core CPUs are based on the Intel 4 process node and use the Crestmont E-Core architecture which comes with a single-threaded core design, houses 4 MB of L2 cache per 4-core cluster, Enhanced AVX2 for AI & Vector operations (2x128), 64 KB L1i and 32 KB ECC L1d cache. The architecture is a 6-wide decode, 6-wide allocate and 8-wide instruction retire design with a 256 instruction out-of-order execution engine and 16 FP32 Flops per cycle.

Some of the newly added features to the Xeon 6700E E-Core CPU lineup include VNNI Int8 & BF16/FP16 (with faster convert) support and AES-256-bit / 2048 encryption key support.

Unlike AMD's Zen 5 and Zen 5C cores which share the same ISA, these two Intel architectures are very different from one another but Intel states that both Xeon P-Core and E-Core CPUs will have a singular and simplified software stack, sharing the same instruction set (extensions), OS & hyper-visor, applications and libraries.

Intel isn't necessarily sharing the individual SKU details at the moment but what they are sharing is information on the rest of the lineup which launch in Q1 2025. These SKUs will include the high-end Xeon 6900E "Sierra Forest" products with up to 288 cores along with the remaining Intel Xeon 6700P, 6500P, 6300P, and SOC products under the "Granite Rapids" lineup.

Intel Xeon 6 Platforms: LGA 7529 For High-End 1S/2S & LGA 4710 For Scalable 1S/8S Configs

With that out of the way, let's talk about the platforms. The Intel 6700 "Sierra Forest" & "Granite Rapids" CPUs will feature support on the LGA 4710 socket platform, internally referred to as the Birch Stream with the reference evaluation platform known as Beechnut City. This platform can be configured in 1S/2S (E-Core) and up to 4S/8S (P-Core) solutions, supporting up to 350W TDP per CPU, 8 memory channels, DDR5-6400/MCR-8000 MT/s support, up to 88 PCIe Gen 5.0 / CXL 2.0 lanes with certain 1S solutions offering up to 136 lanes and 4 UPI 2.0 links running at up to 24 GT/s speeds.

Then we have the higher-end Intel Xeon 6900 "Sierra Forest" and "Granite Rapids" CPUs which will feature support on the LGA 7529 socket platform (Also Birch Stream) with the reference platform known as Avenue City. This platform supports 1S/2S configurations with up to 500W TDP per CPU, 12 memory channels supporting DDR5-6400/MCR-8800 MT/s speeds, up to 96 PCIe Gen 5.0/CXL 2.0 lanes, and up to 6 UPI 2.0 links running at up to 24 GT/s speeds. Following is the maximum CPU config you get on each platform:

Last up, we have some performance numbers. Despite today's announcement mainly being centered around the launch of the Xeon 6700E "Sierra Forest" CPUs, Intel also shares that its Xeon 6900P "Granite Rapids" CPUs will offer 2x higher AI inference performance, 2.3x higher HPC and 2x average general compute uplifts versus the 5th Gen Xeon family (Emerald Rapids).

It looks like a very well-rounded lineup with 128 P-Cores tackling AMD's next-gen EPYC Turin CPUs with the same core count while Sierra Forest battles out with 128 & 192-core Bergamo/Turin-Dense CPUs with 144 and 288-core configurations. It is after a long time that Intel will see core parity with AMD's EPYC lineup and we hope that Intel can continue on this roadmap and make the data center market more competitive in the future.