Intel Granite Rapids-D “Xeon 6 SOC” Powers Edge With Over 3x Cores, 2.5x IO Perf & 2x Ethernet Throughput, Up To 42 Cores Demoed
Intel Granite Rapids-D “Xeon 6 SOC” Powers Edge With Over 3x Cores, 2.5x IO Perf & 2x Ethernet Throughput, Up To 42 Cores Demoed

Intel has detailed its next-gen Granite Rapids-D "Xeon 6 SOC" platform for edge computing customers, powered by the latest P-Core.
During Hot Chips 2024, Intel presented its latest Xeon 6 platform called Xeon 6 SOC, formerly Granite Rapids-D. This is an edge computing chip that is designed to offer compute density for AI and scalar workloads while retaining strong integrated connectivity. These chips are designed for space & power-constrained "ruggedized" environments, offering lots of reliance in the toughest of conditions.
With Xeon 6 SOC, Intel will be aiming for two segments, one optimized towards compute and one optimized towards Edge. The compute-optimized chips will be aimed at scalar and data parallel workloads which require low-latency and high-bandwidth memory with high-bandwidth PCIe 5.0 capabilities and server-grade robustness while the Edge optimized SKUs will offer confidential AI-enabled security and scale across multiple edge systems based on one architecture, supporting multiple Ethernet and accelerators.
Each compute tile is fabricated on the "Intel 3" process node and features a fully modular design approach with the package featuring one or two EMIB die-to-die interconnects depending on the SKU which connects the IO chiplet to the compute chiplet. The configurations will come in 1 to 2 compute tile SKUs.
The entire chaplet structure features a unified cache (LLC) and memory that scales from small to large configurations using a mesh superhighway interconnect. This makes the entire chip feel as if it were a monolithic design with a mesh interconnect, reducing latency and jitter. The IO tile is fabricated on the Intel-4 process node and features integrated accelerators.
Looking at the features Intel has on offer, the Xeon 6 SOC "Granite Rapids-D" CPUs will feature two models, an 8-channel and a 4-channel memory SKU, both of which will feature Redwood Cove P-Cores.
Some of the main highlights include:
Memory support comes in DDR5-5600 and MCR DIMMs with 32 PCIe 5.0 lanes, 16 PCIe 4.0 lanes, and 16 XCL 2.0 lanes. The chips come with 8 Ethernet ports, 2x 100G, 4x 50G, 8x 25G, 10G, 1G, 100M. Plus there are several accelerators packed within each SKU such as a dedicated media accelerator, Intel QAT (Quick Assist Technology, Intel DLB (Dynamic Load Balancer), Intel vRAN Boost, and Intel Data Streaming Accelerator.
As for performance capabilities, Intel says that the Xeon 6 SOC CPUs will offer over 3x increase in core counts and memory bandwidth, up to 2.5x increase in IO performance, and up to 2x increase in integrated Ethernet throughput. The integrated AI accelerator leads to over 8x speedup in Resnet-50 (images/sec) and over 6x speedup in Visual transformer versus the past-generation Xeon D 2899NT CPU (AVX512 VNNI) thanks to the latest AMX instructions.
The Intel Xeon 6 SOC "Granite Rapids-D" CPUs will come in two package sizes too, one with 77.5x50 mm and the other with 77.5x56.5mm layouts. The chips will be scalable across 4-memory and the higher-end 8-memory channel platforms. Also, while Intel isn't sharing any exact core counts, the one variant that was used for the performance evaluation and demos featured 42 cores and was configured with up to 128 GB of DDR5-5600/4800 memory.
Intel has previously confirmed that Granite Rapids-D "Xeon 6 SOC" CPUs are scheduled for launch in 2025 so stay tuned for more information.
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