Compute Express Link 3.0 (CXL) specifications released, up to 64GT/s link rate – AMD, Intel, NVIDIA & Other Onboard

Compute Express Link 3.0 (CXL) specifications released, up to 64GT/s link rate 1

The CXL Consortium, an industry standards body, dedicated to advancing Compute Express Link (CXL) technology, announced the release of the CXL 3.0 specification today, which will be adopted by AMD, Intel, NVIDIA, and other major server players.

The CXL 3.0 specification expands on previous technology generations to increase scalability and optimize system level flows with advanced switching and fabric capabilities, efficient peer-to-peer communications, and fine-grained resource sharing across multiple compute domains.

Modern datacenters require heterogenous and composable architectures to support compute intensive workloads for applications such as Artificial Intelligence and Machine Learning – and we continue to evolve Compute Express Link technology to meet industry requirements. Developed by our dedicated technical workgroup members, the CXL 3.0 specification will enable new usage models in composable disaggregated infrastructure.

Siamak Tavallaei, President, CXL Consortium.

CXL is a transformative technology that continues to build momentum across the industry. The introduction of Compute Express Link 3.0 meets the needs of next-generation data centers with 64 GT/s signaling and a new level of scalability,” said Travis Karr, general manager of Interconnect SoCs at Rambus. “At Rambus, we are extremely proud to be members of the growing CXL ecosystem and committed to the development of solutions that will accelerate the adoption of this exciting new technology.

Travis Karr, general manager of interconnect SoCs at Rambus

The Compute Express Link™ 3.0 specification will introduce fabric capabilities and management, improved memory sharing and pooling, enhanced coherency, and peer-to-peer (P2P) communication.

The Compute Express Link 3.0 specification offers two times the data rate, enhancing data transfer to 64 GTs with zero latency over the previous CXL 2.0. The new specification is currently available for public use.

CXL Consortium and its partnered companies will convey essential insights on Compute Express Link technology during the Flash Memory Summit (FMS) on August 2nd through the 4th.

Fabric capabilities Multi-headed and Fabric Attached Devices Enhanced Fabric Management Composable disaggregated infrastructure

Multi-headed and Fabric Attached Devices

Enhanced Fabric Management

Composable disaggregated infrastructure

Better scalability and improved resource utilization Enhanced memory pooling Multi-level switching New enhanced coherency capabilities Improved software capabilities

Enhanced memory pooling

Multi-level switching

New enhanced coherency capabilities

Improved software capabilities

Doubles the bandwidth to 64GTs

Zero added latency over Compute Express Link 2.0

Full backward compatibility with 2.0, 1.1, and 1.0

The Compute Express Link Consortium will introduce the new CXL 3.0 features at the Flash Memory Summit, starting August 2nd at the Santa Clara Convention Center and ending two days later. You can view the Summit's agenda for detailed information within the shared presentations.

For readers or users interested in discovering more about the new CXL 3.0 specifications, you can find out more here, as well as a Consortium member statement of support. Finally, you can read the official white paper, describing more of the process in further detail and a link to the video above.

News Source: CXL Consortium