AMD’s Enthusiast Ryzen “Strix Halo” APUs Spotted: 120W TDP, FP11 Platform & 64 GB Memory

AMD’s Enthusiast Ryzen “Strix Halo” APUs Spotted: 120W TDP, FP11 Platform & 64 GB Memory

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AMD’s Enthusiast Ryzen “Strix Halo” APUs Spotted: 120W TDP, FP11 Platform & 64 GB Memory
AMD's Enthusiast Ryzen "Strix Halo" APUs Spotted: 120W TDP, FP11 Platform & 64 GB Memory 1

AMD's high-end Ryzen "Strix Halo" APUs have once again been spotted in a shipping manifesto with up to 120W TDP.

The shipping manifestos were spotted at nbd.ltd by @harukaze5719 and include several shipments of the same chip which are expected to have been sent for evaluation and testing purposes. These manifestos also reveal the Maple DAP reference evaluation platform which comes in 32 GB and 64 GB memory capacities. Do note that these are not on-package memory modules like the one we'll see with Lunar Lake CPUs but rather on the reference platform themselves since they come with pre-soldered memory.

The AMD Ryzen "Strix Halo" APUs listed here are 120W which is in line with its maximum TDPs that are expected to hit up to 130W. The reference evaluation platform is based around the FP11 board platform.

The AMD Strix Halo APUs will be the chiplet offerings, utilizing up to 3 dies, 2 CCDs, and 1 GCD. The chips will feature up to 16 Zen 5 cores with 32 threads. These chips will retain the same L1 and L2 cache structure so that's a maximum of 16 MB L2 cache while the L3 cache will be increased to 32 MB per CCD. So we can see up to 64 MB of L3 cache on the top (two CCD) chips. The CCDs are said to be different than the ones used on Granite Ridge. Also, only the GCD is mentioned which means that there might be no IOD on board the package.

For the iGPU side, the Strix Halo APUs will retain the RDNA 3+ graphics architecture but will come equipped with 20 WGPs or 40 Compute units. Additionally, to support such high-end iGPUs on a chiplet design, there will also be an additional 32 MB of MALL cache onboard the IOD that will be eliminating bandwidth bottlenecks for this uber iGPU.

Other specifications include support for up to LPDDR5x-8000 (256-bit) memory, and an AI "XDNA 2" NPU capable of delivering over 70 TOPs. The Strix Halo APUs will be centered around the latest FP11 platforms. These APUs will feature TDPs of 70W (cTDP 55W) and will support peak ratings of up to 130W.

AMD Ryzen AI HX Strix Halo Expected Features:

  • Zen 5 Chiplet Design
  • Up To 16 Cores
  • 64 MB of Shared L3 cache
  • 40 RDNA 3+ Compute Units
  • 32 MB MALL Cache (for iGPU)
  • 256-bit LPDDR5X-8000 Memory Controller
  • XDNA 2 Engine Integrated
  • Up To 60 AI TOPS
  • 16 PCIe Gen4 Lanes
  • 2H 2024 Launch (Expected)
  • FP11 Platform (55W-130W)
  • For display, both AMD Strix and Strix Halo APUs will come with eDP (DP2.1 HBR3) and external DP (DP2.1 UHBR10), USBC Alt-DP (DP2.1 UHBR10) and USB4 Alt-DP (DP2.1 UHBR10) support as a part of their media engines. Strix Halo will feature up to DP2.1 UHBR20 support.

    AMD is expected to formally announce and unveil its next-gen Zen 5 "Ryzen" CPU portfolio at its Computex 2024 keynote so expect more information in less than a month.

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