AMD EPYC 7V73X CPU With 3D V-Cache Tested: Milan-X Offers Impressive Cache Latency & Better Boost Clocks Versus Standard Milan

The cache performance of AMD's flagship Milan-X 3D V-Cache CPU, the EPYC 7V73X, has been tested against standard Milan & showcases phenomenal results.

The flagship AMD EPYC 7V73X CPU will rock 64 cores, 128 threads and feature a maximum TDP of 280W. The clock speeds will be maintained at 2.2 GHz base and 3.5 GHz boost while the cache amount will drive up to an insane 768 MB. This includes the standard 256 MB of L3 cache that the chip features so essentially, we are looking at 512 MB coming from the stacked L3 SRAM which means that each Zen 3 CCD will feature 64 MB of L3 cache. That's an insane 3x increase over the existing EPYC Milan CPUs.

In a performance teaser, tech outlet, Chips and Cheese has posted the first performance metrics highlighting the 3D V-Cache design of the AMD EPYC Milan-X CPU. The performance was compared against the standard EPYC 7763 Milan and EPYC 7V73X Milan-X CPUs. Despite the fact that there is three times the cache on the Milan-X chips, it was able to maintain almost similar latency with the former Milan CPU. Even the 3-4 cycle latency increase is negligible compared to the amount of LLC you are getting with this behemoth of a server chip.

AMD EPYC 7V73X Milan-X vs EPYC 7763 Milan CPU Cache Performance Test (Image Credits: Chips and Cheese):

Another interesting thing mentioned by Chips and Cheese is that not only is the cache performance impressive but the AMD EPYC Milan-X CPU was able to maintain better boost clocks than standard Milan CPUs despite featuring a slightly lower clock speed (on paper). The added performance with the higher clocks 'effectively negates the latency cycle increase' introduced with the 3D V-Cache design.

All I have to say is good job AMD, this minimal latency increase of 3 to 4 cycles is downright amazing considering that this is three times the L3 of standard Milan. Now the clock speed of Milan-X is a little lower on paper; however, it does appear that Milan-X is boosting better than standard Milan, which effectively negates the slight cycle increase of V-Cache.

via Chips and Cheese

A single 3D V-Cache stack would incorporate 64 MB of L3 cache that sits on top of the TSV's already featured on existing Zen 3 CCD's. The cache will add upon the existing 32 MB of L3 cache for a total of 96 MB per CCD. AMD also stated that the V-Cache stack can go up to 8-hi which means a single CCD can technically offer up to 512 MB of L3 cache in addition to the 32 MB cache per Zen 3 CCD. So with a 64 MB of L3 cache, you can technically get up to 768 MB of L3 cache (8 3D V-Cache CCD stacks = 512 MB) which will be a mammoth increase in cache size.

AMD showcased a 66% performance uplift in RTL verifications with Milan-X versus the standard Milan CPU. A live demo showcased how Synopsys VCS Functional verification test was completed by Milan-X 16-core SKU much faster than the non-X 16 core SKU. Chips and Cheese state that they will have more comprehensive performance tests including bandwidth numbers and comparisons to other data center CPUs soon.